blob: 5724283494bc34308c4c45077887dfaa98e6e315 [file] [log] [blame]
Andrew Geissler2daf84b2023-03-31 09:57:23 -05001From 3be91bde755c376a38c3affb9640b39df1acdd9c Mon Sep 17 00:00:00 2001
2From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
3Date: Thu, 22 Dec 2022 11:30:16 +0000
4Subject: [PATCH 32/43] sandbox64: add a test case for UCLASS_NVMXIP
5
6provide a test for NVM XIP devices
7
8The test case allows to make sure of the following:
9
10- The NVM XIP QSPI devices are probed
11- The DT entries are read correctly
12- the data read from the flash by the NVMXIP block driver is correct
13
14Upstream-Status: Submitted
15Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
16Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
17---
18 MAINTAINERS | 1 +
19 test/dm/Makefile | 4 ++
20 test/dm/nvmxip.c | 115 +++++++++++++++++++++++++++++++++++++++++++++++
21 3 files changed, 120 insertions(+)
22 create mode 100644 test/dm/nvmxip.c
23
24diff --git a/MAINTAINERS b/MAINTAINERS
25index ba15dd02d58d..82cb6075cb32 100644
26--- a/MAINTAINERS
27+++ b/MAINTAINERS
28@@ -1210,6 +1210,7 @@ S: Maintained
29 F: doc/develop/driver-model/nvmxip.rst
30 F: doc/device-tree-bindings/nvmxip/nvmxip.txt
31 F: drivers/nvmxip/
32+F: test/dm/nvmxip.c
33
34 NVMEM
35 M: Sean Anderson <seanga2@gmail.com>
36diff --git a/test/dm/Makefile b/test/dm/Makefile
37index 85e99e1c120e..bc8214da2da2 100644
38--- a/test/dm/Makefile
39+++ b/test/dm/Makefile
40@@ -18,6 +18,10 @@ obj-$(CONFIG_UT_DM) += test-uclass.o
41 obj-$(CONFIG_UT_DM) += core.o
42 obj-$(CONFIG_UT_DM) += read.o
43 obj-$(CONFIG_UT_DM) += phys2bus.o
44+ifeq ($(CONFIG_NVMXIP_QSPI)$(CONFIG_SANDBOX64),yy)
45+obj-y += nvmxip.o
46+endif
47+
48 ifneq ($(CONFIG_SANDBOX),)
49 ifeq ($(CONFIG_ACPIGEN),y)
50 obj-y += acpi.o
51diff --git a/test/dm/nvmxip.c b/test/dm/nvmxip.c
52new file mode 100644
53index 000000000000..484e6077b4a9
54--- /dev/null
55+++ b/test/dm/nvmxip.c
56@@ -0,0 +1,115 @@
57+// SPDX-License-Identifier: GPL-2.0+
58+/*
59+ * Functional tests for UCLASS_FFA class
60+ *
61+ * (C) Copyright 2022 ARM Limited
62+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
63+ */
64+
65+#include <common.h>
66+#include <console.h>
67+#include <blk.h>
68+#include <dm.h>
69+#include <dm/test.h>
70+#include "../../drivers/nvmxip/nvmxip.h"
71+#include <test/test.h>
72+#include <test/ut.h>
73+
74+/* NVMXIP devices described in the device tree */
75+#define SANDBOX_NVMXIP_DEVICES 2
76+
77+/* reference device tree data for the probed devices */
78+static struct nvmxip_plat nvmqspi_refdata[SANDBOX_NVMXIP_DEVICES] = {
79+ {0x08000000, 9, 4096}, {0x08200000, 9, 2048}
80+};
81+
82+#define NVMXIP_BLK_START_PATTERN 0x1122334455667788ULL
83+#define NVMXIP_BLK_END_PATTERN 0xa1a2a3a4a5a6a7a8ULL
84+
85+static int dm_nvmxip_flash_sanity(u8 device_idx, void *buffer)
86+{
87+ int i;
88+ u64 *ptr = NULL;
89+ u8 *base = NULL;
90+ unsigned long blksz;
91+
92+ blksz = 1 << nvmqspi_refdata[device_idx].lba_shift;
93+
94+ /* if buffer not NULL, init the flash with the pattern data*/
95+ if (!buffer)
96+ base = map_sysmem(nvmqspi_refdata[device_idx].phys_base, 0);
97+ else
98+ base = buffer;
99+
100+ for (i = 0; i < nvmqspi_refdata[device_idx].lba ; i++) {
101+ ptr = (u64 *)(base + i * blksz);
102+
103+ /* write an 8 bytes pattern at the start of the current block*/
104+ if (!buffer)
105+ *ptr = NVMXIP_BLK_START_PATTERN;
106+ else if (*ptr != NVMXIP_BLK_START_PATTERN)
107+ return -EINVAL;
108+
109+ ptr = (u64 *)((u8 *)ptr + blksz - sizeof(u64));
110+
111+ /* write an 8 bytes pattern at the end of the current block*/
112+ if (!buffer)
113+ *ptr = NVMXIP_BLK_END_PATTERN;
114+ else if (*ptr != NVMXIP_BLK_END_PATTERN)
115+ return -EINVAL;
116+ }
117+
118+ if (!buffer)
119+ unmap_sysmem(base);
120+
121+ return 0;
122+}
123+
124+static int dm_test_nvmxip(struct unit_test_state *uts)
125+{
126+ struct nvmxip_plat *plat_data = NULL;
127+ struct udevice *dev = NULL, *bdev = NULL;
128+ u8 device_idx;
129+ void *buffer = NULL;
130+ unsigned long flashsz;
131+
132+ /* set the flash content first for both devices */
133+ dm_nvmxip_flash_sanity(0, NULL);
134+ dm_nvmxip_flash_sanity(1, NULL);
135+
136+ /* probing all NVM XIP QSPI devices */
137+ for (device_idx = 0, uclass_first_device(UCLASS_NVMXIP, &dev);
138+ dev;
139+ uclass_next_device(&dev), device_idx++) {
140+ plat_data = dev_get_plat(dev);
141+
142+ /* device tree entries checks */
143+ ut_assertok(nvmqspi_refdata[device_idx].phys_base != plat_data->phys_base);
144+ ut_assertok(nvmqspi_refdata[device_idx].lba_shift != plat_data->lba_shift);
145+ ut_assertok(nvmqspi_refdata[device_idx].lba != plat_data->lba);
146+
147+ /* before reading all the flash blocks, let's calculate the flash size */
148+ flashsz = plat_data->lba << plat_data->lba_shift;
149+
150+ /* allocate the user buffer where to copy the blocks data to */
151+ buffer = calloc(flashsz, 1);
152+ ut_assertok(!buffer);
153+
154+ /* the block device is the child of the parent device probed with DT*/
155+ ut_assertok(device_find_first_child(dev, &bdev));
156+
157+ /* reading all the flash blocks*/
158+ ut_asserteq(plat_data->lba, blk_read(bdev, 0, plat_data->lba, buffer));
159+
160+ /* compare the data read from flash with the expected data */
161+ ut_assertok(dm_nvmxip_flash_sanity(device_idx, buffer));
162+
163+ free(buffer);
164+ }
165+
166+ ut_assertok(device_idx != SANDBOX_NVMXIP_DEVICES);
167+
168+ return CMD_RET_SUCCESS;
169+}
170+
171+DM_TEST(dm_test_nvmxip, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
172--
1732.39.2
174